Experiments on Flexibilities for Logic and Routing Optimization in FPGAs

This paper presents experimental evidence for the need to create tighter links between logical and physical domains. Our experimental results show how gains reported by logic level optimizations|aimed at reducing the eeect of interconnect|fail to deliver after the circuits are placed and routed. We use functional exibilities represented by SPFDs 8] to remove redundant wires and nodes in circuits mapped to LUT based FPGAs. For the purpose of our experiments we have chosen FPGAs as our implementation technology, because of the structural and functional exibilities provided by the programmable nature of FPGAs.